
/*M*                     
//                    INTEL CORPORATION PROPRIETARY INFORMATION
//      This software is supplied under the terms of a license agreement or
//      nondisclosure agreement with Intel Corporation and may not be copied
//      or disclosed except in accordance with the terms of that agreement.
//            Copyright (c) 1995-2000 Intel Corporation.  All Rights Reserved.
//
*M*/
/*
 * $Log:   //cospublic004/shareddata/ISC/ISC2x/COMMON/SRC/imb/kcs.h.v  $
 * 
 *    Rev 1.4   29 Nov 1999 11:25:54   mramacha
 * Added static to function prototypes to suppress
 * warnings.
 * 
 *    Rev 1.3   07 Oct 1999 15:28:08   jpaiasno
 * Added  new BMC transfer state machine code
 *  to KCS interface for IPMI 1.0 conformance
 * 
 *    Rev 1.2   01 Mar 1999 16:39:42   jrdidner
 * Added a new state to the driver state machine.
 * This state implements a delay (which gives up the CPU) 
 * when appropriate.
 * 
 * This modification significantly reduces the CPU Utilization
 * impact of ISC on KCS systems (lancewood, cypress, sitka).
 * 
 * 
 *    Rev 1.1   08 Dec 1998 10:55:46   jpaiasno
 * Added code to support async.
 * DPC events from the EMP console.
 * 
 *    Rev 1.3   24 Mar 1998 14:26:22   fkhanx
 * Added copyright header
*/
#define KCS_READY_DELAY		WAIT_5_MS
#define BMC_RESPONSE_DELAY	WAIT_5_MS	// how long to wait for a response after sending req
#define BMC_RETRY_DELAY		(60 * WAIT_1_MS)	// how long to wait after an error before retrying
//
// Keyboard Controller Style Interface addresses and defines
//
#define KCS_BASE				0xca2
#define KCS_COMMAND_REGISTER	(KCS_BASE + 1)
#define KCS_STATUS_REGISTER		(KCS_BASE + 1)
#define KCS_DATAIN_REGISTER		KCS_BASE
#define KCS_DATAOUT_REGISTER	KCS_BASE

#define MAX_INVALID_RESPONSE_COUNT	2	// number of BMC request send retries 

//
// Status register bit flags
//
#define KCS_STATE_MASK		0xc0
#define KCS_IDLE_STATE		0x00
#define KCS_READ_STATE		0x40
#define KCS_WRITE_STATE		0x80
#define KCS_ERROR_STATE		0xc0

#define KCS_IBF				0x02
#define KCS_OBF				0x01

#define KCS_SMS_ATN			0x04

//
// State machine states
//
#define TRANSFER_INIT		1
#define TRANSFER_START		2
#define TRANSFER_NEXT		3
#define TRANSFER_END		4	// send last byte of request
#define RECEIVE_START		5	// wait for BMC to transition to read state
#define RECEIVE_INIT		6	// wait for first data byte to become available
#define RECEIVE_NEXT		7	// collect data byte and ask for more
#define RECEIVE_INIT2		8	// wait for next data byte to become available
#define RECEIVE_END			9
#define MACHINE_END			10
#define TRANSFER_ERROR		0

//
// KCS commands
//
#define WRITE_START			0x61
#define WRITE_END			0x62
#define READ				0x68

static IMB_STATUS
SendBmcRequestNew (

		BmcRequest *	request,
		DWORD 			reqLength,
		BmcResponse *	response,
		DWORD *			respLength,
		void *			context
	);

 static BOOL ClearOBF( void *context );
