-- ***************************************************************************
-- 64-bit Intel(R) Xeon(TM) processor MP with 8MB L3 cache Boundary Scan Descriptor
-- Language (BSDL) Model Cell Descriptor File, Version 1.0
--
-- Production stepping
-- 
-- ***************************************************************************
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-- intellectual property right. Intel products are not intended for use in
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--
-- Intel may make changes to specifications and product descriptions at any
-- time, without notice.
--
-- The 64-bit Intel(R) Xeon(TM) processor MP with 8MB L3 cachemay contain design
-- defects or errors known as errata which may cause the product to deviate
-- from published specifications. Current characterized errata are available
-- on request.
--
-- Contact your local Intel sales office or your distributor to obtain the
-- latest specifications and before placing your product order.
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-- Copyright (c) 2005 Intel Corporation
-- ***************************************************************************


-- ===========================================================================
--
-- ---------------------------------------------------------
--
-- 64-bit Intel(R) Xeon(TM) processor MP with 8MB L3 cache Cell Descriptor File
-- Production stepping
--
-- ---------------------------------------------------------

package XEONMPL3_CELLS is

use STD_1149_1_1994.all;

   constant BS_G : CELL_INFO;		-- Bidirectional I/O cell
   constant BS_4 : CELL_INFO;		-- Input Cell

end XEONMPL3_CELLS;

package body XEONMPL3_CELLS is

   constant BS_G: CELL_INFO :=
     ( 
       (INPUT,     EXTEST,  PI),
       (INPUT,     SAMPLE,  PI),
       (OUTPUT2,   SAMPLE,  PI),
       (OUTPUT2,   EXTEST,  PI)
     );

   constant BS_4: CELL_INFO :=
     ( (INPUT,     EXTEST,  PI),
       (INPUT,     SAMPLE,  PI)
     );

end XEONMPL3_CELLS;